[Eug-lug] Re: Concurrency

Allen Brown allen_brown at agilent.com
Tue Jan 11 10:14:39 PST 2005


walter fry wrote:
> At last something I can understand,,In the late 1960's I heard a comment 
> that the next great breakthrough would be three dimensional chip 
> architecture, at that time it was thought that heat dissipation would 
> become the biggest hurdle

Heat dissipation is a huge issue still.

>> What causes most of the slowdown in going from CPU to main memory is
>> the pads and PC board.  On chip signals have orders of magnitude less
>> capacitance and so can go at least an order of magnitude faster.
>>
>> One technology that is being considered is optical interconnect.  That
>> would provide a tremendous speedup to this pathway.  The technology
>> isn't ready yet.  I don't know how long it will take to appear.
>>
>> But once you have optical interconnect, it can be used on chip as
>> well as off chip.  Recall that Herb indicated the speed limit of
>> current processors is basically caused by interconnect.  Optical
>> interconnect changes that and greatly reduces the speed cost of long
>> distance signaling
> 
> 
> Perhaps vertical integration is waiting for optical interconnects, which 
> would probably be GaAs due to higher speed than Si as well as higher 
> efficiencies
>   WF

Silicon has improved to the point where GaAs's speed advantage is
not so high.

I think vertical integration is constrained by power.  The
exception is RAM, which potentially doesn't need as much.
A way to eliminate the power problem would be to switch to
a carbon substrate.  Diamond is an excellent thermal conductor.
And the resulting transistors can run at much higher temperatures
without melting.
-- 
Allen Brown
   work: Agilent Technologies      non-work: http://www.peak.org/~abrown/
         allen_brown at agilent.com	            abrown at peak.org
   I think I think; therefore, I think I am. ---Ambrose Bierce


More information about the EUGLUG mailing list