[Eug-lug] Concurrency, (free lunch is over article)

[Allen Brown]

On Fri, 7 Jan 2005, Bob Miller wrote:

> Mike Cherba wrote:
> 
> > Both/either.  For example; One way we use multiple cores in our Network
> > security processor designs is to dedicate cores to providing a specific
> > stage of the network stack.  This allows much less cache thrashing and
> > more efficient usage than if all the cores were in an SMP session and
> > being used as available for whichever network processing needed to be
> > done.  We can repurpose cores as needed to balance capacity with demand.
> > The effectiveness of this and various other approaches does admittedly
> > rely heavily on the underlying hardware architecture.  Does each core
> > have its own cache?  how are bus accesses prioritiezed in hardware?  is
> > this a Load/Store architecture or and EIP implimentation?  Do any of the
> > cores have independant RAM?  I guess the real questin is going to be how
> > to best use whatever design Intel/AMD decide to sell us.
> 
> Okay, now I understand.  I had thought you were arguing for
> task-specific CPUs.  The interesting question is, how do the CPUs
> interface with memory.  Presumably on-chip caches get bigger, and the
> off-chip memory buses get faster, but can they be scaled as well as
> the CPUs on chip?
[cut]
> -- 
> Bob Miller                              K<bob>

What causes most of the slowdown in going from CPU to main memory is
the pads and PC board.  On chip signals have orders of magnitude less
capacitance and so can go at least an order of magnitude faster.

One technology that is being considered is optical interconnect.  That
would provide a tremendous speedup to this pathway.  The technology
isn't ready yet.  I don't know how long it will take to appear.

But once you have optical interconnect, it can be used on chip as
well as off chip.  Recall that Herb indicated the speed limit of
current processors is basically caused by interconnect.  Optical
interconnect changes that and greatly reduces the speed cost of long
distance signaling.
--
Allen Brown
  work: Agilent Technologies      non-work: http://www.peak.org/~abrown/
        allen_brown at agilent.com             abrown at peak.org
  Two plus two does not equal five, even for very large values of two.